WWW Cache Control Mechanism in the AI3 Satellite Network
نویسندگان
چکیده
منابع مشابه
The MINC (Multistage Interconnection Network with Cache Control Mechanism) Chip
Although bus connected multiprocessors have been widely used as high-end workstations or servers, the number of connected processors is strictly limited by the maximum bandwidth of the shared bus. Instead of them, a switch connected multiprocessor which uses a crossbar or Multistage Interconnection Networks(MINs) for connecting processors and memory modules is a hopeful candidate. However, in s...
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اندیشمندان و صاحب نظران علوم اجتماعی بر این باورند که مرحله تازه ای در تاریخ جوامع بشری اغاز شده است. ویژگیهای این جامعه نو را می توان پدیده هایی از جمله اقتصاد اطلاعاتی جهانی ، هندسه متغیر شبکه ای، فرهنگ مجاز واقعی ، توسعه حیرت انگیز فناوری های دیجیتال، خدمات پیوسته و نیز فشردگی زمان و مکان برشمرد. از سوی دیگر قدرت به عنوان موضوع اصلی علم سیاست جایگاه مهمی در روابط انسانی دارد، قدرت و بازتولید...
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A novel approach to the cache coherent Multistage Interconnection Network (MIN) called the MINC (MIN with Cache control mechanism) is proposed. In the MINC, the directory is located only on the shared memory using the Reduced Hierarchical Bit-map Directory schemes (RHBDs). In the RHBD, the bit map directory is reduced and carried in the packet header for quick multicasting without accessing dir...
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Internet traffic has increased due to the development of richer web content and services. In particular, IP telephony, Messengers, and Twitter are composed of a large number of small packets, and these services are expected to increase. Thus, routers need to handle largebandwidth fine-grain communication. We proposed a network processor called P-Gear, which has a special cache mechanism that re...
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ژورنال
عنوان ژورنال: Transactions of the Institute of Systems, Control and Information Engineers
سال: 2000
ISSN: 1342-5668,2185-811X
DOI: 10.5687/iscie.13.10_449